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 Analog Voltage Generator 2

 

Continued from Page 1 

I did some more playing with the PLL circuit tonight and I can tell you this much for certain--if the PLL is adjusted right and your feedback is good, the circuit will find resonance in a split second.  It will go right to the resonant point and lock anywhere in its configured bandwidth.  From there, as long as you stay in that bandwidth, it will stay locked.  You can change capacitance, duty cycle, whatever you want and the PLL will track the resonant point.

For testing I'm just using a wall transformer in step-up configuration and adding/subtracting capacitors on the high side with my current loop around it.  My feedback circuit isn't real good, but there's enough signal there for the PLL to find the rising edge and hang with it wherever I move it.

 

Matt can you share feedback circuit you use ,  that work the best on Coils ,please?

 

 

ndy, this is the circuit I plan on testing next once my parts get here.  I'll drive it with 5 volts like everything else.  I expect it to work the best, but still need to run it through the paces.

I'm currently using Stan's circuit with the LM741 replaced by a LM358.  It's okay, but not the best.  Not real stable either--I notice the behavior change when I attach a scope probe.

The thing to keep in mind is that whatever signal the feedback circuit produces, that's the signal the PLL will track, so it's important the feedback circuit sees the right thing.  Part of this is the pickup coil or sensor and the rest is the feedback circuit itself.  With the circuit below, it's probably best to use shielded coax from the pickup coil back to the feedback circuit, which can be done pretty easily since one side is grounded.

 

Thank you very much I will build this circuit.
Matt when scanning circuit change frequency of the PLL - then PLL seeks for max amplitude of signal and lock to this frequency of max amplitude ?

 

I'm not implementing the scanning circuit at this point.   From what I can see so far, the PLL does everything we need.  If the PLL is configured to have its capture range anywhere around the actual resonant frequency point, the PLL will find this frequency and track it automatically.  All that is needed is to adjust the PLL center frequency so that it's somewhere close to the actual resonant frequency of the VIC and WFC.  I'm currently looking at how to best adjust the capture range so the PLL doesn't attempt to lock on a harmonic, which can happen if the center frequency is set too high.

The PLL itself doesn't look at amplitude at all.  It finds the edge of the signal, typically at the zero crossing.  Hence, it's called a phase lock loop, because phase is what it is tracking.  The means it uses to do this is by adjusting its internal VCO frequency until the phase angles line up or match.  The output of the VCO drives the VIC and the feedback into the PLL phase detector determines how good a match it has and adjusts the frequency of the VCO accordingly.  What you get in the end is exactly like you said--maximum amplitude or a resonant condition with voltage and current exactly 90 degrees from each other.  This is the crux of impedance--a condition where at maximum voltage, there is zero current, which is why the voltage rises--there's nothing to stop it.  Resistance can "impede" current, but it cannot do anything to voltage.  So with no current, no resistance is felt by the tank circuit.  Keep in mind this is only true precisely where the current is zero; at any other phase angle this is no longer true--regular Ohm's Law rules apply.

Where I'm a little concerned about all this is the talk of frequency doubling.  What this is, is a wave traveling through the coils and bouncing back in such a way where you have two waves superimposed on each other--one came from the driver and the other is the reflected wave.  I suspect the feedback may see both of these waves; if it does, it will try to speed up the VCO to match the phase, which is not what we want.  I'm not real sure yet how Stan handled this unless by purely using a filter.  It should be possible to take the signal exiting the feedback circuit and divide this by two before sending it to the PLL phase detector.  I can't see that Stan did this or if he did, I'm not understanding how without using a D flip-flop or something similar.  Maybe based on where the pickup coil is positioned, the feedback circuit never sees the reflected wave.  Just not real certain at this point, but we will find out.

 

 

Thank You Matt very very much for this explanation which help me understand how pll work. It was big mystery for my.
thankyou

 

Matt
Is the pickup coil and resonant feedback circuit see the ringing of LC circuit on its natural frequency after pulse from the primary coil from output "4" of PLL? 

 

By way of the driver circuit yes, that's what should happen.

The VIC & WFC is the bell.  The pulse from the driver is the hammer that strikes the bell.  The pickup coil is the microphone and the feedback circuit is the amplifier.  What the PLL hears coming from the feedback circuit tells it exactly when to strike the bell with the hammer to get it ringing as loud and strong as is possible.

 

What is the task of signal going from primary coil thru 22k resistor and 330 pF cap to input "3" of PLL?

 

The only thing I can think of is this little low-pass filter network is what keeps the PLL focused on the fundamental frequency as I mentioned earlier.  Otherwise it is fully possible the PLL might try to lock on both the main and the reflected wave, forcing it to speed up.

What I find disconcerting is the way this bodge is connected.  The VCO Output (pin 4) is connected to the Comparator Input (pin 3) which is right where this filter terminates, so it's pushing against another output which is typically not a good thing to do.  I have no idea what kind of signal strength might try to get through that filter.  It has the potential of popping the CD4046 chip with a strong enough impulse.  The diode in parallel with the primary is a must-have component with the filter connected.

I've seen a lot of electronic circuits over the years that are not correctly designed, even though they appear to work properly.  This may be one of those quick-n-dirty solutions Stan used to avoid having new boards fabricated.  The three decade counters is also another clue Stan didn't really know for sure what to expect when he connected up the VIC card to his system.  If he would have known in advance exactly what frequency range to expect, he would have designed the VIC card to run at that range and no other.  Like us now, Stan's card was a work-in-progress.

 

Let's not forget Matt, some of the other ViC's went to other things like the gas processor steam resonator ect. which would require different ranges but could use the same card if it had different ranges to work with. It's all appreciated Ronnie.  The more we learn, the more we grow.

Yes, it does make sense that Stan would build multi-purpose boards.  I'm not quite at that level yet.  I like purpose-built things still.   :-)   Probably comes from being a software engineer for so many years.

=============================================

Boy ain't that the truth.  Equipment, parts and lots of time reading, studying, building and getting quite frustrated when things don't seem to come together.

So Ronnie, did you say crackling like bacon...?

I was playing around tonight with my circuit and noticed I couldn't run too long without a heatsink on my voltage control regulator, so I pulled it out and mounted a nice heavy copper heatsink to it.  After that, I cranked up the juice and decided to connect my wound bobbins and core (that I know won't work, but are good enough to tinker with) so I could see how the PLL, gating and feedback all work with real parts hooked to it.  I started at 2 volts and just slowly turned up the voltage watching the scope.  Everything except the feedback was working real good.  The feedback was all over the map causing the PLL to jump around constantly trying to lock onto the screwy signals.  What the heck, I figured I'd crank up the voltage some more and just see what happens, maybe the thing would settle down with a stronger signal.  That's not at all what it did though.  At about six volts the core was starting to hiss and squeal a little; by the time I got to ten volts the core was going nuts--popping, scratching, hissing like a pressure cooker about to blow.  The scope was just a blur of signals jumping all over the place.  It really made me think about "crackling like bacon".  If that kind of chaotic signal is what's needed to get the water to pop apart, it sure looks like this circuit can do it.  Hopefully it doesn't let too many demons out--they sure sound ticked off.

============================================

You should have signals jumping all over the place on the scope. From the sound of things you got it going on Matt.

 

Matt, do you have the cores fastened really well? 
what was on the coil side? cap diode or just the coil(s) ? 

i know when my cores are not hald really nice they want to chatter like crazy, but its not the same as " bakin" 

~Russ
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The feedback was all over the map causing the PLL to jump around constantly trying to lock onto the screwy signals.

this was my experience in the bast with the PLL and stans circuit. Tony wood sides, the one we made here, and soon to test a SM VIC card " replaca" type will see how it dose...

~Russ 

 

===============================

All I can say for the moment is we need to follow the clues wherever they lead.  Look at it all as though you were a child and assume nothing.

============================

There is a way to cancel out the pulsing circuit from the feedback. All you're left with are harmonics to lock onto. Try that.
Is this already designed in the circuit?

 

If one were to place a CSR at the cell, I suspect what you would see would be completely independent of the pulses going into the primary.  If that signal was properly isolated, amplified, squared off (clipped) and fed back to the PLL, I have no idea what might happen.  The problem I think we would have in doing that is isolation--20,000 volts is a lot to deal with, both signal-wise and power.

"The voltage can reach up to infinity, if the electronic components allow it to happen." ~Stan

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Matt
You wrote:
Where I'm a little concerned about all this is the talk of frequency doubling.  What this is, is a wave traveling through the coils and bouncing back in such a way where you have two waves superimposed on each other--one came from the driver and the other is the reflected wave.  I suspect the feedback may see both of these waves; if it does, it will try to speed up the VCO to match the phase, which is not what we want.  I'm not real sure yet how Stan handled this unless by purely using a filter.  It should be possible to take the signal exiting the feedback circuit and divide this by two before sending it to the PLL phase detector.  I can't see that Stan did this or if he did, I'm not understanding how without using a D flip-flop or something similar.  Maybe based on where the pickup coil is positioned, the feedback circuit never sees the reflected wave.  Just not real certain at this point, but we will find out.
end quote

Matt maybe it is the ansver:
Stan used 741 chip , I find this:
741 IC is relatively slow which limits the usage of zero-crossing detectors with it to around 10 KHz.

Sorry Stan used ECG918M but I cant find its datasheet.
andy

 

The probable equivalent to ECG918M can be the LM318N fast opAmp and it is cheap. Can anyone confirm this?

 

=====================================================

 

Andy, we see 741 Op-amps in the estate photos and though they are typically used with bipolar power supplies, they were used nonetheless.  I'm pretty certain they will operate well into the ultrasonic frequency range.

On the issue of frequency doubling, here's a little video of a friend of mine in Whales that was able to replicate such a phenomena.  In this case he suspects the core halves were vibrating causing this effect to manifest.

 

Double the frequency through the split.

Take a look at where Stan put his pickup coil.

Slope Detector -- another variation for the feedback circuit.  Probably should try it and see how it behaves.

This should sync pretty well on the sine rise & fall times and pickup any harmonics that may be in the signal, unlike Stan's detector that will clip everything except the main signal.

k got my 6n137's in and got things working, there sure are some strange things groin on with all those transistors. but its pulsing...

Matt, schematic confirmed. and you know those - voltage spikes? well i was getting those but only at low voltages. ringing in the coil... not quite like your sim, but still interesting. 

I connected everything up with the ferite cores. and DRY cell's 6 in series.  at first i left a big gap in the core, but then decided to try to stick the closer and Snap... they popped together... and they were stuck that way. takes *some force to pull them back apart. if i drop the voltage lower they do not stick as much, but  when the voltage is around 5v or so... they hold really good. that tells me there is some DC bias ALLWAYS. also when really crainking it up around resonance they do not chatter, they just hold firm.... hummm.  i also can see this the sig never drops below 2V or so. ( the bottom of the pulse sig) this is by design. 

 now something to note here is i had a resistor across point where the voltage control is and GND. i cant remember the value, might been a 1k or 10k, i did this because with out it the voltage control dose not work right, when nothing is connected to the output. and i forgot to remove it... should not effect anything tho. 



as far as resonance goes, measuring from the "0" point and a cap, i was getting around 150V and on the other i was getting around 100V . this was a nice sighn wave, nothing off set. across the cap i was getting around 45V 

my scope is all deffrental and floating... something to note. 
the coils set was an old one. i just wanted to see the sig coming from the driver / voltage control circuit. 

~Russ 

Green is Sig gen 
Yellow is across the coil. 
Purple is the cell. (in one photo )

neg v

Slope Detector -- another variation for the feedback circuit.  Probably should try it and see how it behaves.

This should sync pretty well on the sine rise & fall times and pickup any harmonics that may be in the signal, unlike Stan's detector that will clip everything except the main signal.

Matt, thats basicaly what stan did. note that stan's feed back coils were not connected like this tho, they were one open ended and the other across the "feed back circuit" and 5V 

~Russ 

WAG...?

Diode (and connecting wire) ringing from the inductor kickback.  Why it goes away when the voltage is increased?  Because I think at that point the diode remains saturated.

Overall, things look pretty good.  I'm curious when you get your adjustable LDO regulators swapped-in if you see the same behavior.  I sure did when I replaced the VAC with the LM338.  Do put a heatsink on them before you put any power to them, even at two volts it will start warming up.

Matt, thats basicaly what stan did. note that stan's feed back coils were not connected like this tho, they were one open ended and the other across the "feed back circuit" and 5V

Yes, I suspect the patent version was actually a little too good and didn't allow the harmonics in the way that is needed.  The clipping method can work if you have a strong enough signal and only want to track the fundamental frequency.  I think this slope version might do some really interesting things.  When my comparators get here tomorrow, I'll starting working on it so we know for sure.  I suspect this method being 90 degrees out of phase might do some weird things.  It will be interesting to see how the phase detector handles it.

 

Stan also connected 10uF electrolytic cap between pick-up coil and 10k resistor going to input "3" of ECG918M

 

Some goodies about the ECG918M here: http://open-source-energy.org/?topic=2283.0

 

Backed up here also 
 

I got the LM393 comparator wired up this evening but it's so sensitive with open-loop gain.  Really difficult to work with on a bread-board.  The slightest little adjustment and the PLL runs off into la-la land.  I'm afraid the only way to use this device would be to have the pickup coil completely shielded with coax running back to the input of the comparator.

I tried the slope detection method and I think it can work, but you must have the right size capacitor, which I haven't been able to determine trial-n-error as yet.  It also appears a bipolar power source may be needed which I can probably do with just a pair of resistors.

More work to do I reckon.

 

On a positive note, the CD74HCT27, CD74HCT221 and CD74HCT7046 chips I received today all work superbly.  Gating no longer truncates the pulses and this particular PLL tracks like a dream, plus it has a direct output you can use to illuminate an LED for phase-lock status.

So at this point, I have the signal generation working really good.  Just need to figure out the feedback side and I'll have something to start designing a board around.

Quote from ~Russ on January 5th, 11:09 PM

I connected everything up with the ferite cores. and DRY cell's 6 in series.  at first i left a big gap in the core, but then decided to try to stick the closer and Snap... they popped together... and they were stuck that way. takes *some force to pull them back apart. if i drop the voltage lower they do not stick as much, but  when the voltage is around 5v or so... they hold really good. that tells me there is some DC bias ALLWAYS. also when really crainking it up around resonance they do not chatter, they just hold firm.... hummm.  i also can see this the sig never drops below 2V or so. ( the bottom of the pulse sig) this is by design.

 

Yep. The flat cores did that with me. I don't think DC bias has any useful explanation to make this work.

 

On a positive note, the CD74HCT27, CD74HCT221 and CD74HCT7046 chips I received today all work superbly.

 

Revised chips have improved specs and meet a quality standard (JEDEC of 747046). TI has a foot in here.

 

===============================================================

Well, never trust the schematics on semi-conductor datasheets, they could be wrong.  In the case of the LM393 comparator, it was wrong and it took a lot searching around until I identified the error.

So, my question to you all is:

Have you ever built a VIC driver that makes the core go absolutely nuts like this?
 

===============================================================

 

 

 what do you make of it?

That's a solid Amorphous C-core sitting on my desk, bouncing, popping and chattering like crazy.  Drive power is only about 10 volts at 250 milliamps.  Any guesses what might happen if I put another couple of coils on there and connect it to a WFC?

 

======================================================================

Only a PLL put into this particular situation is going to behave as this thing does.  I don't think it's accidental either.  I think Stan did it this way on purpose, based on his circuits.  And when you hear Dr. Greer speak about Stan not disclosing in his patents the necessary operating frequency, it's because Stan looked at the scope and noticed there is no actual operating frequency.  There's what might look like a fundamental, but beyond that any engineer would say it's just noise.  The only catch is, the "noise" is coming from the core, not the electronics.  The feedback network is telling the PLL exactly what is there and the PLL is basically saying, that can't be right, run with this frequency instead.  The cycle recurses on itself forever.

I'll try to do another video where you can see better what I see; maybe that will help make up your mind what is going on.

 

=======================================================================

The circuit is not a true random noise (number) generator. For that, you'll need a source of non-deterministic entropy.

"Noise" in this case is what the PLL inputs trigger upon what is being fed back in.

This was not accidentally designed from the beginning. He knew what to do and acted accordingly. Most don't know a 4046.

Like all software and hardware development, may a bug be found in the machine someplace untriggered. Sometimes known as, a bug becomes part of the design.

Stan paid the fee for that patent. It had to work like so.

=========================================================================

Does the feedback coil have a 10uF non-polar cap in series in this setup? (Bodged on VIC card.) That would low-pass or shrink the bandwidth down, for the PLL to see where to trigger.

 

 

"Noise" in this case is what the PLL inputs trigger upon what is being fed back in.

Not so much "trigger upon", but phase align with.  And to accomplish this, it changes the frequency of its VCO.  But in this case, every time it changes the frequency, the feedback phase changes also.  The PLL is trying to hit a moving target and it has no way to predict where the next phase angle will be.  It only has the algorithm encoded in the silicon to work with and that's not enough to stay ten steps ahead of what the core will actually do.I've done quite a bit with PLLs and resonant circuits; only lately have I seen others (in Russia) doing exactly what this circuit I have prototyped is doing.  And I might add, those few people in Russia are doing this on purpose with air core coils so you cannot hear what is happening like you can with a solid core.  They are doing this to create standing waves inside the coils.

 

 

Does the feedback coil have a 10uF non-polar cap in series in this setup? (Bodged on VIC card.) That would low-pass or shrink the bandwidth down, for the PLL to see where to trigger.

 

I can't say, but it makes sense that it would.

If I shunt the little red 1uF Wima cap on my current setup, guess what happens?

It goes straight into resonance.  The signal it sees from the feedback very closely matches the signal that is being fed into the primary.  The PLL locks and the system is fully stable all through the voltage ranges.

4046 uses tri state bit banging (pin 2 or 13) to regulate vco frequency output depending on feedback input. it fills up and empties a capacitor C2 depending on it´s phase comparator. capacitance of that capacitor is important because it depends on that capacitance C2 and resistor R3 weather vco frequency changes quick or slow meaning respective phase alignment search is quick or slow.

and remember: 4046 exists in 2 different versions. the one stan used had 2 comparators but there is another 4046 with 3 different internal phase detect methods. be sure to use the one with 2 phase detect methods or it will not work the way stan did.

4046 uses tri state bit banging (pin 2 or 13) to regulate vco frequency

That may sound like it is strictly digital to many, but I'll assure you the VCO frequency is purely analog.  It can do frequencies you can't touch with a digital solution.

Quote from Gunther Rattay on January 8th, 02:02 AM

and remember: 4046 exists in 2 different versions. the one stan used had 2 comparators but there is another 4046 with 3 different internal phase detect methods. be sure to use the one with 2 phase detect methods or it will not work the way stan did.

I'm using the CD74HCT7046A.  This version has an order of magnitude larger bandwidth and a direct phase-lock indicator output.  It is pin compatible with the CD4046B as used in Stan's circuit.  There are a couple of subtle differences in the component values you must select due to the 5 volt TTL compatible power requirements.A good read is the attached document.

Quote

One should always be aware that textbook approaches often are developed for applications not identified or with limitations and assumptions not given.

 

scha003b.pdf -

 

==================================================

That may sound like it is strictly digital to many, but I'll assure you the VCO frequency is purely analog.

True, purely analog using tri state to get up, down and hold state for C2 charge

Matt
You wrote:
If I shunt the little red 1uF Wima cap on my current setup, guess what happens? Starting at page 13 @ TI pdf: The lock Schmitt trigger appears to be consolidated into the 7046. On the VIC card after 4046 pins 1 & 2, go right to a dual 4001 Schmitt trigger.

It uses input pins 14 & 3 for the internal lock detector.

For 7046 pin 15, the cap would be 0.01uF, 10nF, from VIC trace.

This PDF is helpful.

Where was connected this 1 uF Wima cap in your setup?

 

====================================

Where was connected this 1 uF Wima cap in your setup?

The feedback circuit is terminated with a high frequency current sense transformer and the feedback coil on the main core loops through this current sense transformer in-series with the 1uF cap.  The motivation for doing it this way is to eliminate as much electrostatic disturbance from the LM393 zero-cross detector as possible.  If the pickup coil is connected directly to the LM393, it is way too sensitive and just passing your hand near it throws it all out of whack.



It's the same idea why we use 4 to 20 mA current loops instead of high impedance voltage signals for instrumentation.  Current is stable, voltage is not.

For 7046 pin 15, the cap would be 0.01uF, 10nF, from VIC trace.

It's really not all that critical for the LED.  The capacitor you select mostly just determines how much flicker in the LED you want to tolerate when on or near lock.

Quote from haxar on January 8th, 02:42 PM

This PDF is helpful.

Yes it is.  If you want to plow through all the math, you can design a PLL circuit to do pretty much anything you want, but it's still good to do some trial-n-error experimenting to really get a feel for this chip and its behavior.  Spend enough time doing that and you will probably find things you actually want but didn't know you could do.A little progress today, ten plus hours worth.  Take a peak and post any obvious errors if you spot them.  Attached is the whole DipTrace project for this board with my custom libraries, datasheets and PDF printouts.

I know it will take me at least three days staring at everything before I dare try to send them out to fabrication.  One little hole in the wrong place or a shunted trace where it shouldn't be and that's $150 down the toilet.

VIC    BOARD DESIGN   DipTrace.zip   not finished Matt's still working on it.

 

Matt
Did you noticed 100uF/35V capacitor connected in between the base of TIP 120 and +12V rail on the VIC card?
How it affect  the work of whole driver and switching on and off the TIP 120?
thank
andy

 

Did you noticed 100uF/35V capacitor connected in between the base of TIP 120 and +12V rail on the VIC card?

No, I did not notice a capacitor placed there.  Can you please post a snippet where you see that.

Quote from andy on January 11th, 10:04 AM

How it affect  the work of whole driver and switching on and off the TIP 120?

Snubbing the base of the main pulse transistor would vastly change the behavior.  I would kind of need to see that before I believe it.  In all the schematics, photos and thread postings, this is the first I've heard of such a thing.

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Re: Understanding SM Driver Circuit, Building A Test Driver Voltage control Board

« Reply #278, 56 days ago »Last edited 56 days ago

Quote from haxar on January 11th, 03:28 AM

Matt's still working on it.

Found one bug so far.   The CLR and B inputs of the CD74HCT221 need to be pulled high for normal operation.  I have that on my bread-board but didn't do it in the schematic or the PCB.

I'll post an update before day's end.  In the meantime, here's what the board looks like so far.

Great stuff!!!  :-)

The current transformer feedback solution is interesting, I hope the zero crossings are spot on!

I have some questions:

-This new design holds the PLL in lock when on/off gate signal is used?
-What is the min, max frequency of the PLL locking range?
-Is the duty cycle still 50% at the TIP120?
-Is the PLL VCO_OUT frequency still in phase with the signal from the TIP120 when it goes through all the transistors?
-Signal from the TIP120 P- (cap 10pF and res 22Mohm) are left out compared with Stan circuit, pin 3 CIN PLL / COMP_I is not needed?
-Is your feedback signal LM393 (digital) in phase with the coils (analog) on resonance frequency when testing on a LC tank circuit?

~webmug

But how to connect those metal tabs?  use a interconnector socket shown below left 

shown below right is  example of the pins use , some version of this VIC board the pins placement may varying study , it is easy once you start looking

Warm Regards 

Dan 

Great stuff!!!  :-)

Thank you Webmug.  When I go several months without making a board like this, it only takes a about ten minutes to remind myself it's going to be another all nighter.  I wish there was an easier way.

Quote from Webmug on January 11th, 12:47 PM

The current transformer feedback solution is interesting, I hope the zero crossings are spot on!

From what I can tell so far, this reduces electrostatic false detection considerably.  It doesn't go completely away, but it's an order of magnitude less to deal with.

Quote from Webmug on January 11th, 12:47 PM

-This new design holds the PLL in lock when on/off gate signal is used?

It seems to.  At gate you can see the PLL start to hunt a little, but it comes right back in unless you aggressively gate, then the PLL looses its mind.

Quote from Webmug on January 11th, 12:47 PM

-What is the min, max frequency of the PLL locking range?

Starts at about 1kHz and goes up beyond 50kHz.  I don't know if that is enough range or not, but this particular chip handles a much wider bandwidth than the CD4046B.

Quote from Webmug on January 11th, 12:47 PM

-Is the duty cycle still 50% at the TIP120?

Correct.

Quote from Webmug on January 11th, 12:47 PM

-Is the PLL VCO_OUT frequency still in phase with the signal from the TIP120 when it goes through all the transistors?

Relatively--better at lower frequencies than higher.  I can't help but think Stan put all those transistors in there intentionally to create delay.  I wish I knew how much he was looking for and why.

Quote from Webmug on January 11th, 12:47 PM

-Signal from the TIP120 P- (cap 10pF and res 22Mohm) are left out compared with Stan circuit, pin 3 CIN PLL / COMP_I is not needed?

That's still a bit of an open-ended discussion as to what Stan was trying to accomplish.  I left them out on this board, but may try to shoehorn them back in with a jumper selection.  I personally didn't like the idea of slamming output signals together.  If this signal needs to be filtered and fed back in, it should IMHO go through some sort of dedicated mixer.

Quote from Webmug on January 11th, 12:47 PM

-Is your feedback signal LM393 (digital) in phase with the coils (analog) on resonance frequency when testing on a LC tank circuit?

Again, relatively.  Better at lower frequencies.

I have a hunch everything will tighten up when I go from a bread-board solution to the final PCB.  I'm still in decision mode whether to push the button on ordering fabs.  Kind of want to let this sit for a few more days and see if I discover any more whoops'.  It's not like I haven't screwed up before--I have a pile of no-workie boards in a box already.  Just hate to add to that collection.

Did you noticed 100uF/35V capacitor connected in between the base of TIP 120 and +12V rail on the VIC card?

It is beside 470 ohm resistor going to base of the TIP 120

Do you see this capacitor?

I'm pretty sure this big electrolytic capacitor doesn't connect to the base of the TIP120.  I think we would have caught that one by now.  If I'm looking at the wrong thing, can you point it out to me with a screenshot like this.

Yes it is connected to + 12V and ground.
Sorry , my mistake. Thank for clear up Matt.

Here are the duty cycle scope-shots from 1kHz to 16kHz.Going to try and plot these and find the actual curve created by the VIC Driver circuit.

I will do the same. Mine is different.Matt can you switch back to the SM components. In using the first version of this driver and I can go up to at lease 20khz. We need to make sure our voltage control dose not change the outcome. ~Russ

 

I will do the same. Mine is different.Matt can you switch back to the SM components. In using the first version of this driver and I can go up to at lease 20khz. We need to make sure our voltage control dose not change the outcome. ~Russ

So you think using the LM338 for the voltage control is changing the duty cycle?   Not impossible I guess.  I'll have to try it and see.

Anyway, here's my data and frequency plot.  Duty cycle is perfectly linear.  You can see pretty clearly where the off-time frequency enters the megahertz range.  You can also see where the on-time frequency has a maximum shift near the middle of the range.  The trick now is to comprehend what this data is really telling us.

I want to be sure. Otherwise will never know. I'll also check with my other voltage regulator. It might also have some effect. ~Russ

 

My question now is:

Do we tune the VIC & WFC to the driver or take a chance on trying to tune the driver to the VIC & WFC ?

 

Tune the VIC & WFC

for now... 

if we cant get it to work but think we know why... then we can change it .

however, allways keep the circuit the same , so we are only trying to tune one part of the system. 

as soon as some one else tries to do it and they need to cant get it to work.... 

~Russ

 

========================

Okay, so the voltage control change back to the original method Stan has does nothing for changing the cutoff frequency, but there is something that does.  See below.  Now my question is, what should it be?

My gut feeling is this should be a tuning parameter with a 1k minimum and a 10k pot to zero-in-on the characteristics of the VIC & WFC.

Notice Stan has something there too, but placed just before the TIP120.  My guess this resistor was bundled in the nest of wires in the VIC cage.  I haven't seen any reference to what its value should be and if I was going to hide a really important tuning variable, that's where I'd hide it.

I think you definitely need fix duty cycle ,imagine that the car has an ignition that is drifting it certainly would not be good

its not what is needed, its what was...

Matt,

according to the cards... theirs nothing there. 
according to don's hands on's disassembly... theirs nothing there. 
so unless you have photo x-ray vision :) i'm not so sure there's anything there... 

it is kinda a nice way to change that curve !!?? hummm

so now its the 2n222... yours is an A version... ill look at mine, but i think its not the A version... not sure tho. will look ( later today... 12:55am) 

~Russ

Notice Stan has something there too, but placed just before the TIP120.  My guess this resistor was bundled in the nest of wires in the VIC cage.  I haven't seen any reference to what its value should be and if I was going to hide a really important tuning variable, that's where I'd hide it.

This is a pull-down resistor. The TIP120 does this internally. Thus, omitted from the card

 

======================================================

Matt
Stan was said many times:
We are working from 0 to 10 kHz range.
I thing there is no need to go beyond 10 kHz.

======================================================

Matt
Stan was said many times:
We are working from 0 to 10 kHz range.
I thing there is no need to go beyond 10 kHz.

Quote from Webmug on December 23rd, 2016, 02:41 PM

My findings using this driver is that it only worked pulsing below 10khz. If you go higher 50%du is no longer maintained due transistor bias etc. Way to complex! So designing the cell and coils resonance freq. must be below 10khz. Unfortunately my setup uses higher frequency and i switched to mosfet instead.
~webmug

 

===========================================

 seems to.  At gate you can see the PLL start to hunt a little, but it comes right back in unless you aggressively gate, then the PLL looses its mind.

Starts at about 1kHz and goes up beyond 50kHz.  I don't know if that is enough range or not, but this particular chip handles a much wider bandwidth than the CD4046B.

That's still a bit of an open-ended discussion as to what Stan was trying to accomplish.  I left them out on this board, but may try to shoehorn them back in with a jumper selection.  I personally didn't like the idea of slamming output signals together.  If this signal needs to be filtered and fed back in, it should IMHO go through some sort of dedicated mixer.

So the PLL function was not tested on a LC tank circuit? If the du (duty-cycle) of 50% is not there how can you lock-in? 
I tested the PLL (with the circuit Stan used and a mosfet circuit) and could not get it to lock after gating the pulses. Gunther had the same problem getting the PLL locking-in after gating. Solution is inserting a lower pulse signal in the gate time so the PLL sees the resonance.
I noticed Brad has the same signal I used in his YT video. https://youtu.be/0ZNpYhd8eEc

What Stan was trying to accomplish is getting the pulse signal in the primary at 50% du , because else you can't get it into pure resonance. I think the cap and resistor was there to get the 50% du feedback syncing the signals in the PLL from the primary. Kinda strange...

@Brad,
How did you generate those signals? :)

~webmug

 

====================================================

 

so now its the 2n222... yours is an A version... ill look at mine, but i think its not the A version...

Doesn't matter Russ.  Scope through the driver circuit and you will see the 50% duty cycle is maintained all the way through until you get to the base of the TIP120--that's where you'll see duty cycle gets altered.

 

This is a pull-down resistor. The TIP120 does this internally. Thus, omitted from the card.

Yeap.  And if 16kHz is high enough for the VIC & WFC, you're probably good to go.What we do know is if different manufacturers of the TIP120 used different internal resistors.  The ST version I have has 7k + 70 internal.  The OnSemi uses 8k + 120.  So there is the difference in pull-down values and why Stan probably had that in his patent--because it depends on where you source your components.

 

 So the PLL function was not tested on a LC tank circuit? If the du (duty-cycle) of 50% is not there how can you lock-in?

It locks using mode II which is only interested in the phase angle.  It doesn't care about the pulse width at all.

I can drive the PLL circuit by way of the feedback from my signal generator and it will track whatever I do, with any duty cycle I send it.  So with normal feedback from the VIC, if there is any resonance there, the PLL will go straight to it.  The only catch is the driver has to let through the frequency the VCO is generating and at the moment that frequency is capped by the driver, not the VCO/PLL.

Doesn't matter Russ.  Scope through the driver circuit and you will see the 50% duty cycle is maintained all the way through until you get to the base of the TIP120--that's where you'll see duty cycle gets altered.



Yeap.  And if 16kHz is high enough for the VIC & WFC, you're probably good to go.

What we do know is if different manufacturers of the TIP120 used different internal resistors.  The ST version I have has 7k + 70k internal.  The OnSemi uses 8k + 120k.  So there is the difference in pull-down values and why Stan probably had that in his patent--because it depends on where you source your components.



It locks using mode II which is only interested in the phase angle.  It doesn't care about the pulse width at all.

I can drive the PLL circuit by way of the feedback from my signal generator and it will track whatever I do, with any duty cycle I send it.  So with normal feedback from the VIC, if there is any resonance there, the PLL will go straight to it.  The only catch is the driver has to let through the frequency the VCO is generating.

This is with gate where there are no pulses present?  :) 
120ohm instead of 120kohm 
http://sensitiveresearch.com/elec/DoNotTIP/index.html  

 

the back up pdf here for link dead LOL  remember down load all record all one day it will be gone

That's good advice provided you don't alter the rise/fall times.  The TIP120 is fairly slow and possibly for good reason.

 

=========================

Doesn't matter Russ.  Scope through the driver circuit and you will see the 50% duty cycle is maintained all the way through until you get to the base of the TIP120--that's where you'll see duty cycle gets altered.

Cool I'll test this with my 4 channial scope. Also I have a 2 types of tip120. I'll test them both. 

Good find Matt. ~Russ

 

========================

ok, i have an ST version its got a R1 7K +R2 .07K of 7.07K its top cut off is 35ish khz
 i have an fairchild version its got a R1 8K +R2 .12K of 8.120K its top cut off is 22ish khz

im going to use the ST version. 

also my 2n222 are not the A version

and i had my L2 wired backwards so my last tests were nall.... 

~Russ

 

==========================================

 

oh and yes its just the tip120 that messes up the PW. agreed matt

=================================================================

 

If Stan used a TIP120 in this circuit, that would mean the total bandwidth of the VIC circuit would be below the highest frequency cutoff of the TIP120 used.35kHz or 22kHz cutoff as Russ mentioned.50% duty cycle must be persistent throughout all frequencies. The PLL does this cleanly.

 

=================================================================

50% duty cycle must be persistent throughout all frequencies. The PLL does this cleanly.

I wouldn't be so quick to state that.  The rolloff of the duty cycle going to 100% allows for an intersection between frequency that is linear and gate off time that is not.  This forces a point where the two plots must cross within a fairly small range of frequencies.

The PLL/VCO always outputs 50% duty cycle, the VIC driver does not.  This is no accident.

 

============================================================

I wouldn't be so quick to state that.

An assertion. Not a conclusion. Rebuttable.

PLL and 50% duty cycle should be in the same sentence.

 

============================================================

oh and yes its just the tip120 that messes up the PW. agreed matt

Yeap.  The smaller the resistance the higher the cutoff frequency.

We can be pretty certain this creates a sweet spot in the frequency range.  What we need to find out now is what part of the VIC the frequency is the dominant factor and what part of the VIC is the off-time the dominant factor.  If I had to make a guess, I would say it has to do with polarization via the phase angles, but that's just a guess at this point.  I say that because duty cycle is a direct proportion of the full cycle time which is indicative of phase angle.  And phase angle indicates where you have plus versus minus in the sine wave.

With two chokes in the VIC, if one could always push positive charge and the other always push negative charge at a specific frequency, then you have the recipe for charging a capacitor.  Make L2 slightly out-of-phase from L1 and use duty cycle to do what you want from each of them?   You got it man, bring on the HHO.

 

==============================================================

Just to note, sound cards in the 1980s didn't exist in Stan's era. Maybe MIDI.

The VIC could be powered by a simple sound card. It's bandwidth is up to 24kHz, which is the limit of the TIP120.

 

Yeap.  The smaller the resistance the higher the cutoff frequency.

If Stan says to wind more wire on the secondary, the bandwidth to achieve resonance will be lower.

 

==============================================================

Webmug,

I use a dual channel frequency gen....First I put the Hf and Gate through a 4011 and 4013 ic to sync the two then combine them two using a few 2n2222's which drive the base of a TIP120.

It's all on a breadboard right now so I don't have a schematic yet....I'm waiting on a smaller value pot because the TIP120 is not switching the lower amplitude pulses. Still refining things a bit, but so far I get clean square waves to the TIP120 base unless I take the voltage too high.

 

===================================================================

also please note that my other testing the L2 was wrong. 

it now connected per Don's sketch.

and i do get out of phasing as expected from the chokes... 


but to be honest the VIC did not react as well as i hoped lol 

right at about 15Khz was both chokes resonant, but less voltage than before. 
i also had the tape in the cores still. 

Dry cells as well 

~Russ

 

right at about 15Khz was both chokes resonant, but less voltage than before. 
i also had the tape in the cores still. 
~Russ

Question do I understand this correctly: "you also used tape to create air-gap between the MN67 core halves of the 5 coil VIC?" why, it already has a low k factor flat core?

Looking at your measurements of that VIC has too high turn counts.

Your measured Cd (self-capacitance) isn't right, only when you find the SRF (self resonant frequency) of the coil, you can calculate the Cd. Now it is based on the test frequency of the LCR meter. Cd @SRF should be in the 100pF .. 106pF range...hmm?? your series cells..hmm??

But by now you probably know this...

~webmug

 

ebmug " But by now you probably know this..."

do me a favor, assume i know nothing. this is good :) 

keep poking at this with me... we need all the help we can get! 

yes, I'm using a small piece of tape, i did this because when you close the gap the inductance go way past what we want in my opinion. ( to large) 
i need to find a smaller shim tho. the tape is to much and there to (to small) 

indeed i wrapped a lot more wire than i needed because the resistance is closer to what Stan used, but planed on unwraping a lot, i wanted to have the ability to take some off :) 

with that said. my next step is to get a smaller shim. more inductance, lower the F ???

keep thinking webmug, ill keep testing some stuff!!!!

~Russ 

 

==========================================

Russ, it's interesting that your seeing peaks at 15kHz now...Was the only change you made reversing the L2 choke? 

If Stan is telling the truth all coils should be aiding. So if  you short the chokes on one end then measure the inductance you should get over 2H (depending on k factor). Mine measure around 4H.

===========================================

 

thats it, the only thing i did was change the leads on the L2 coil. 

there was other points of interest but that was the best point where Both L1 and L2 were giving off the max peak... 

"If Stan is telling the truth all coils should be aiding."
well according to what don had on his sketch... 

~Russ 

 

=============================================

don's sketch.

===========================================

 

 

Russ, it's interesting that your seeing peaks at 15kHz now...Was the only change you made reversing the L2 choke? 

If Stan is telling the truth all coils should be aiding. So if  you short the chokes on one end then measure the inductance you should get over 2H (depending on k factor). Mine measure around 4H.

Are you sure about aiding? It is not aiding but its opposing according to Dynodon sketches.
I tried all different coil positions, this series opposing gets me opposite but equal voltages only. I won't argue with you. 
This is just my opinion :)

~webmug

 

===================================================================

Matt already did this. But I'm doing it again for my sanity. 

If we look at magnetic flux 
Here all coils are adding in magnetic flux 

But not in electron / curent flow. Do not. 

Where am I thinking wrong. This is in one direction. The other with the dioed and it's more complicated. 

~Russ

=============================

 

I could be wrong but from Don's drawings it looks like the chokes are aiding each other but opposing the primary and secondary coils. 

I would think that was Stan's trick to having all coils on the same core and preventing the chokes from acting as secondary coils. 

I have tried numerous coil configurations and see little differences?  Maybe I need to go back and look at my notes...

I think your drawing is correct Russ.

=============================================

ok so now look at this,

this is what the flux from the primary will be doing to the flow of current... Via magnetic flux (right drawing)  you can see the blue circle's are places of conflict... where the current flow will be apposing... so looking at it this way, we can see that Pri and Sec are adding in magnetic flux but the L1,L2 are are opposing with current. 

the left hand photo is the one from before, it shows the conflict of flow of current vs the magnetic flux. here we can see that Pri and Sec are adding in magnetic flux but the L1,L2 are are opposing in magnetic flux. 

so it dose no madder how we look at it. there are apposing things going on here. 

by the way this is just if there was lets say DC on the primary... all kinda of other interactions happen when its a "PFN" its a new new animal.

but we need to break it down like this so we can do all the math on it...

by the way dont worry about the "flow" going the wrong way with my + and - signs : )

so now the questions are this, what happens if we break the core?  things change...  some.. enough that we need to factor that in. 

please correct me again if i'm confused.  again we some times get lost in our words... but this photo should clear that up... 
~Russ

bu the way this is why the Ground refrance point can be thought as in the Sec and L2 connection... it *should* be the 0 Point... although its floating...  again go back to that schematic where there were grounds drawn in...  

 

GND

this goes with that. coils called TX

S to S, F to F for the sec and chokes is it not?

S to S, F to F for the sec and chokes is it not?

yes thats what i got. 

~Russ 

 

I see what your saying about the diode....Interesting thing though, if I put the secondary coil negative or positive lead to the diode I get the same results in the circuit, except one way the current is a little higher.

Here's a video I made earlier today after adjusting the choke orientation and inductances again. Scanning from 4-25kHz....Just wanting to see if others are seeing similar things. The blue trace is the current flow between the diode and the L2 choke.

I'm not 100% sure this correct, but it's what Ronnie posted early in this thread.  The second one is what I reduced to a schematic.

Does it agree or disagree with what you have?

It doesn't agree with Don's sketch on the chokes....On Don's sketch the current travels in the same direction on both chokes (from their Start to Finish, so they are aiding). The chokes oppose the primary & secondary since its on the opposite leg but their current is still going in the same direction. 

http://www.electronics-tutorials.ws/inductor/series-inductors.html                            PDF  BACK UP OF DOC HERE LOL SAVE IT 

See 'Cumulatively Coupled Series Inductors' and 'Differentially Coupled Series Inductors' about 1/4 way down the page.

Since the core is circular the flux points one way on one leg and the opposite way on the other leg, but all coils are oriented the same way...Primary and secondary are aiding, and the L1 and L2 chokes are aiding, but the transformer side and chokes are opposing each other. 

I think the reason for this was to keep the chokes from acting as additional secondary coils. 

It could be that Don made a mistake though....Since we know Ronnie has had it working. 

oh geese, now i' m lost... Ronnie keep telling my over and over that "its connected just like Stan's"  

one step forward 20 steps backwards. 

so what it is. here is everything i have downloaded from the other thread.  

i just went back over Stan's estate photos and concluded that don's sketch is correct.

 

=======================================================================

I guess time will tell us more....The whole thing with the coils is confusing....On that diagram 620 of Stan's the chokes are opposing, which is funny because in the first few pages of the TB he states they are aiding. ..I think it's one of those things where Stan put it all in there to cover himself and protect the invention. 

I know Ronnie pointed out earlier that the L2 choke opposed the secondary coil and caused the virtual ground to be moved between the secondary and L2....The only problem I see is if that were a requirement to get the VIC working then how would it work when the chokes are on a separate core?

This should be accurate if Don's sketch is what we base our work on.

The blue colored Secondary has its dot switched, compared with the Tech Brief.

Contrast that with Don's sketch: the Start and Finish for both C1 and C2 are switched. (They should be called L1 & L2.)

This is wired right, regardless of Don's Start&Finish error on the sketch.

The primary could be switched. It is unipolar and that can matter.

The corrected Capture13 image has its arrows pointing in the same direction.

Quote from Webmug on January 15th, 08:53 AM

So the PLL function was not tested on a LC tank circuit? If the du (duty-cycle) of 50% is not there how can you lock-in? 
I tested the PLL (with the circuit Stan used and a mosfet circuit) and could not get it to lock after gating the pulses. Gunther had the same problem getting the PLL locking-in after gating. Solution is inserting a lower pulse signal in the gate time so the PLL sees the resonance.g

I had the problem with CD4046 and that headed to PGen 2.0 microcontroller solution. last significant frequency is stored during gating time and reestablished with next pulse after end of gating.

Hax, I still have a question about the winding direction and the dot notation.

It has been said all the coils are wound the same direction start to finish--basically the bobbins were put in the same coil winder and spun the same way.  If this is true, the phasing dots should all be at the same place for each coil following the flux path.  It doesn't matter whether you flip the start/finish positions as long as the coil is wrapped in the same direction.

Where you have moved the dot position on the secondary, tells me this particular coil had to have been wound the opposite direction.  That's the only way the phasing could be opposite to the flux path.

So phasing dots are correct in my original, whether the wiring is correct, I still don't know.


If you look at Stan's drawing though, clearly the L2 is not wound the same direction as the others.

Quote from Matt Watts on January 17th, 02:28 AM

It has been said all the coils are wound the same direction start to finish--basically the bobbins were put in the same coil winder and spun the same way.

Yep. I don't see evidence where L2 is indeed opposing. All aiding and wound in the same direction.

 

Quote from Matt Watts on January 17th, 02:28 AM

Where you have moved the dot position on the secondary, tells me this particular coil had to have been wound the opposite direction.  That's the only way the phasing could be opposite to the flux path.

The phasing dot on the Secondary is connected towards the diode. GrandmasChristmas-VIC image reflects that.

 

 

Quote from Matt Watts on January 17th, 02:28 AM

If you look at Stan's drawing though, clearly the L2 is not wound the same direction as the others.

Does the text say otherwise? Actually, this is Figure 3-23 of the Tech Brief. It has no phasing dots

If we are absolutely certain all the coils are spun on their bobbins in the same rotation, this image pretty much tells us the orientation.

CORRECT

Matt, that photo is correct you just posted.

=================================

And the schematic now looks like this.

Going once.  Going twice.  G...

CORRECT

If you look at Stan's drawing though, clearly the L2 is not wound the same direction as the others.

Can you see this again? If you were to short B+ to B- in Figure 3-23, the circuit flow remains the same. There's no supporting text otherwise for an opposing coil.

If it's electrically oriented correctly, it's good I think.

For some devices I've seen, replicating them must be exact, electrically (phase), wind rotation and start/finish location.  Hopefully we got it.

I like using the schematic representation of the VIC when we are laying numbers on the images, makes it easier to comprehend test results.  This schematic should be good based on our assumptions.

Matt, that photo is correct you just posted.

ok so here it is. 


and attached is the equivalent. 
and don's sketch. you can see there different. 

in don's sketch 
L2 and Sec,   there apposing  
L1 and Sec    there adding 
L2 and L1      there apposing

In Ronnie's the wires to the cell's and Sec are switched. i left the arrows off for now because its confusing some one else check me. 

what this means is that in Ronnie diagram
L2 and Sec,   there...
L1 and Sec    there... 
L2 and L1      there...

I have looked at this for a long time, and now I'm getting confused lol 

if you flip the coil, and the wires, you can get the same results. and i be leave thats what Ronnie did, so it comes out the same???


oh man... 

by the way i see now that all the VIC coils are the same in the over all photos ( where all cards are layed out in one shot) , but the photos that Don has on the table when he was taking it apart are flipped!!!  everything is filliped! this will mess you up fast... and now its hard to tell whats what.  
basically its upside down! 

if you flip the coil, and the wires, you can get the same results.

Wind a little coil on a pencil and think about that.

If you flip only the coil (start/finish) and reconnect the wires in the same location nothing changes phase-wise.   But if you flip the wires, you toggle the phase.  If you want to change the phase, you have two choices:  Flip the wires or reverse the winding direction.  Start/finish doesn't matter to the phase.  It may matter if you need the high voltage outputs at the exterior of the coil instead of the interior though.

 

 

==============================

by the way this is more accurate photo that Ronnie posted... . this matches up to don's sketch! 

so that photo i used with the wires switched could be right if you flip the coils and the wires. its the same... all backwards but right.

==============================

 

Problem with that photo is the phasing dots.  They are clearly wrong if all the windings are turned in the same rotation.

================

Problem with that photo is the phasing dots.  They are clearly wrong if all the windings are turned in the same rotation.

i see, well ok,

i connected my system up like in that photo. http://open-source-energy.org/?action=dlattach;topic=2820.0;attach=15004

I found it to be more interesting than what i got with don sketch drawing. but in the photo there i was not getting the chokes out of phase. only with don's sketch. 

i would have to imagine that we want to cell to be " out of phase"  aka apposing voltage potential....

??

~Russ

==================================

i would have to imagine that we want to cell to be " out of phase"  aka apposing voltage potential....

At a glancing look I can see this to be true, but when you think about it a little deeper, we really want the two chokes in-phase.  Remember though, they can never be exactly in-phase because L2 has fewer turns.  So L2 will effectively finish its cycle time before that of L1 and the secondary.  If L2 finishes first, then it is already into the next cycle before L1 and secondary finishes.  This is the misalignment I'm talking about and I think this is where the polarization comes from, because what I see happening is each cycle actually resets by the VIC driver.  The VIC driver is synced to the feedback of the core which comes from the half of the core with the primary, the feedback coil and L2.  So what really happens is L2 sets the cycle time and L1 and the secondary never get a chance to completely finish a complete cycle.  So when L2 gets back to the zero volt mark, L1 and the secondary are still lagging behind with negative volts.  We can flip that by starting the signal low, then ending high--basically just move in the wave by 180 degrees.  In this case when L2 completes a cycle and is back at zero volts, L1 and the secondary are lagging behind with plus volts.  So to get optimal voltage from each cycle we would want L1 and the secondary lagging behind by 90 degrees, that would put it right at the peak voltage when the cycle is reset.

I think it is important to notice why L1 and the secondary are on one core half and L2 and the primary are on the other.  If they where on the same core with no gap, the VIC driver would attempt to force them all to follow the same cycle time, but with the loose coupling of the separate core halves and the gap, L1 and the secondary tend to oscillate at their own natural frequency which is lower than L2 and the driving signal of the primary.

I also think the diode between the secondary and L1 reduces much of the mutual inductance so that each coil tends to operate independently of the other, each at their own natural frequency.  Otherwise those two coils acting together as one big coil would have a frequency way lower than L2, probably less than half.  Ideally, each coil should oscillate at 75% of L2 to get maximum voltage polarization for each cycle of the VIC driver.

 

=============================\

yeah, with you Matt. makes sentence. 

so i guess my first round of testing when the L1,L2 were in phase is more correct.... 

~Russ

================================\

by the way when Ronnie agrees that something is right i agree, because i trust he dose indeed have a working cell. 

so we press on...

where to start... again... 
~Russ

 

==================

 

It gets even more confusing when you put the coils on two separate cores like many of us are doing. 
I have my primary and secondary on one core and both chokes on the other....Not sure how else it will work since there is no coupling between two seperate cores?

 

============================

I recall Ronnie talking about the two-core solution and that the cores need to physically touch each other at the right place.  So there should be some coupling.

 

========================

This should be accurate if Don's sketch is what we base our work on.

Hi, Matt. Those graphics you posted triggered a long-buried memory about a PDF file I'd archived in my large compendium of research done by others, so I went digging.

The PDF is titled "Guidelines to Bucking Coils", by Chris Sykes at HyIQ.org. You might check it out for pointers.

=========================

I recall Ronnie talking about the two-core solution and that the cores need to physically touch each other at the right place.  So there should be some coupling.

We need to know for sure....If not were all shooting in the dark.

So...Now I am wanting to understand exactly what the diode does in the circuit and if it plays a role in the ground being moved between the secondary and L2 choke, or if that's simply due to the L2 choke opposing the secondary?

 

=================================================

I recall Ronnie talking about the two-core solution and that the cores need to physically touch each other at the right place.  So there should be some coupling.

Ronnie did say to place them side by side but not quite touching, however 
In my set up i found best result having them positioned on top of each other 
primary and L1 on the bottom and Sec and L2 on top in the same way stan has them visualy.
but Ron's set up will be different to mine so i can only assume that that i'm getting good output voltage wise 
slight difference in coil will have different out come.
not sure if it matters at the moment but i'm only able to read 2000vac out the L1L2 no Cell..  

 

================================================

Haven't been on in a few days.

I modified my vic box so the cores are touching each other...Primary and secondary coil are on one core, L1 & L2 are on another. 

And yes you guys are right about the coils. 

Here's what my coils look like now. 

Dom, can you post a pic or drawing showing the layout of your coils?One more thing

Has anyone here got the drive circuit to work and dive the VIC?

Just wondering because I'd like to test it out to see if I get different results than my circuit gives me.

One more thing...

Working on it HMS.  Russ wants original components for the voltage control, so I'm in the process of re-engineering it back and adding the ability to move some jumpers for direct signal generator input or onboard PLL.

I'll post the schematic when complete and test the bread-boarded version when my VIC is finished.  If it seems to do the job, I'll fab the boards for whoever wants one.Cool, Thanks for the update Matt.

Earlier today I tried setting up the primary and secondary on dual cores with the cores pushed together. 

Result was not good, with 5v in the primary coil the secondary was only putting out 500mV open. 

With both coils on the same core 3V on the primary puts out around 23V open.

So having the primary and secondary on the Chinese cores most of use are using results in terrible coupling and a huge voltage loss.

I wonder if there is a larger version with the same diameter legs that would fit all 4 coils on it? 

Ronnie, are you using the same china cores? How are yours laid out?

HMS
You can try this way:

Look'n good andy.  Nice compact little VIC setup.
 :thumbsup:
I'd be a little surprised if you can get 3000 turns of AWG 29 on those bobbins though.

 

Here are my coils i have removed them from my housing as the secondary coil is splitting and needs to be replaced.
The second pic is how i have wired it.

Nice setups guys,

Andy, we're you able to fit enough wire on there to match the resistances of Stans vic?
That looks great btw. I was thinking of doing something similar. 

Dom,  have you checked to see if your coupling is any good?  Like I mentioned before when I try to put my cores together the coupling is terrible so I end up with a voltage loss.

 

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HMS
Photo that I posted I was find somewhere on the net, dont remember where . I dont build it but look  encouragingly. I will try make bobbins like this.

 

HMS
Photo that I posted I was find somewhere on the net, dont remember where . I dont build it but look  encouragingly. I will try make bobbins like this.

I think I might start looking for a core that can fit all the bobbins on it if I can't get my dual core setup to work.

 

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Dom,  have you checked to see if your coupling is any good?  Like I mentioned before when I try to put my cores together the coupling is terrible so I end up with a voltage loss.

Not exactly... as I'm unsure as to how to check the actual coupling of the cores but I have tried several different ways of positioning and found the best results when placed as in my pic... 

Brad the only thing I can see different in your setup is your coil position I'm sure you already know your primary and secondary are on same core,
Have the primary and L1 on one core and secondary and L2 on the other... 
bellow 9vdc input I get 100 to one step up to A/C over 9vdc input I get approx 150 to 1, I found that with my pwm and gate set to minimum 2v in getting 230vac out as I increase the frequency  the output drops until I find the rite voltage in to match the frequency and same goes if I increase or alter the voltage input then again I find the rite frequency and voltage jumps up again. I get a spark ark at around 850vac across a spark plug capped to approx 1mm that's when the coils start crackling I only have the coils power supply frequency and gate band that's all, I couldn't see how Ronnie was getting spark plug to spark with transistors etc so there's more to learn there..

 

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Thanks for the info. 

I'll try that next. 
I wonder how Ronnie has his setup?

 

 

Dom
Ronnie say that primary and L2 on one core , and secondary and L1 on the other. Or I miss something?

 

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Andy
Yes he may have, All I can say is he has his name on the diagram and that's how I have been operating my coils. 
We need Ronnie to varafy which is correct. 
That could be why I couldn't get past the polarisation stage... 
more testing to be done.

 

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Hi guys! Here they have ferrite U cores 
http://powermagnetics.co.uk/pace-components/ferrite-cores/u-cores/u60x55x15-cf138

 

 

 

 

Asking aside where do you get the diode? I got some TVS diodes from ebay and they were small semiconductor types rated 500 watts DC. I wanted to put them between the power supply and the generating build. They worked for about 5 minutes and then bulged at less that 50 watts. Fortunately
the isolation furthered the validation in the 5 minutes and I have 4 more. For a diode does ac or dc matter they seem to be used for both but usually semiconductor boards are in DC.   

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